|
JStik Specifications (see the documentation area for complete technical data) |
| JStik is designed around an aJile
Systems aJ-100 32-bit native Java execution controller, up to 8
MBytes of 32-bit wide memory, and on-board 10BaseT hardware. It is programmable directly in Java, which is its native instruction
set. |
| See the notes about JStik versions above, since this detail is not yet in the data sheet. |
| aJile Systems aJ-100 | Native Java execution
controller at up to 100 MHz. J2ME CLDC with some MIDP support
now, CDC in future. |
| Flash | All JStiks have 4 MBytes of 90-nsec flash with a 32-bit wide data path. This can be used for program storage and/or flash file system. There is provision for doubling this to 8 MBytes by using higher density devices. |
| SRAM | JStik.LP has 2 MBytes of 55 nsec low-power SRAM. A possible future version, JStik.HS has 1 MBytes of 10- or 12-nsec SRAM. The data path to SRAM is 32 bits wide. |
| RS232 com1 & com2 | RS232 at up to 115 kbaud, 5x2 2mm
headers with adapters for DCE or DTE. RS232 level shifters can be disabled by controller I/O bits. The TTL-level serial signals also appear on the JSimm bus. |
| power supply | JStik can be powered two ways: 1) 3.3 VDC or 2) 5-14 VDC using two separate contacts on the JSimm connector. JStik has an onboard switching regulator which, if proved 5-14 VDC, generates 3.3V for JStik's use and provides 3.3V at 100 mA for your use. JStick can also be powered with 3.3 VDC regulated +/- 5%. All the JStik circuitry is powered by 3.3V. |
| JSimm expansion and I/O | The SimmStick® compatible JSimm bus provides access to many I/O pins such as serial I/O, timers, counters, etc. The pinout is identical to that on the JStamp development station and the JCX backplane. |
| 10BaseT ethernet | JStik has the same ethernet controller as SaJe. The onboard RJ45 connector has link and activity lights. |
| high speed byte-wide I/O Bus | JStik has a high speed, memory-mapped, buffered 3.3 and 5 volt TTL level compataible I/O bus for connection to high speed image sensors, ADC or DAC, etc. This bus uses a standard 2mm header. The data path is 8 bits wide. There are 12 address lines, two chip selects, and RD and WR strobes. Note: this is much more than a simple bidirectional byte latch. It is a complete, very high-speed I/O bus engineered to support multiple high speed devices on a single JStik. For example it is capable of supporting multiple CAN controllers, multiple high speed UARTs, ADC and DAC all at the same time. The I/O bus supports peripherals of varying speed by use of selectable wait states on a per-device basis. You can mix slower and faster peripherals on the I/O bus and each can operate at its optimal speed without affecting the other. |
| LEGO® I/O, Dallas 1Wire, CAN, RF, clock & calendar, etc | Since JStik uses the JSimm bus, all the standard JSimm and JCX modules simple plug and play. New JSimm modules are being designed to add popular features to JStik such as more UARTs, MMC (multi-media memory card), etc. |
| Physical size | JSimm
SIMM30 module, 2.65 inches tall. This is identical to the large SimmStick boards. |
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