TStik ™
TINI390, TStik1, New!TStik2, New!SNAP
Signal Compatibility
updated 2005 April 07
TINI400 in the familiar
SIMM72 module
package
TStik is powered by Dallas Semiconductor TINI

TStik2 is an incrementally improved version of TStik.72.nb revision 1.XX. TStik2 is fully backward-compatible with TStik1 and even more compatible with the older TINI390 module.

The main benefits of TStik 2 are:

  1. Serial1 can be used for 1-Wire or as a UART. It's no longer dedicated to 1-Wire. TStik2 therefore has up to three UARTs available (if your socket board has the connections to support them)!
  2. Serial1 can be switched on-the-fly at runtime between 1-Wire and UART functions. This is made possible through our jumper-less TStik configuration register.
  3. NVRAM battery life has been increased by about 10X under worst-case conditions, when TStik is not powered.
  4. CAN and I2C now have separate pins so that they can be used simultaneously. TStik2 may be the only TINI400 module with this capability.
  5. A 15 MHz crystal means that precise CAN baud rates above 125 kbaud are now possible.

This page focusses on the differences and compatibility issues between the DSTINI1 (TINI390) module, TStik1, TStik2, and SNAP. It is not a complete pin list and description for TStik1 - for that information please see the TStik1 detailed signal description page.

TStik2 is shipping now, though quantities are limited as we ramp up production. Please check back here for news, or join the TStik user group (see the support menu above) for the latest news.

Summary of DSTINI1, TStik Rev1, TStik Rev 2, and SNAP Differences
The very high speed JStik is not a SIMM72 product so is not listed here. Please see the JStik web area for its details
Capability/Feature
DSTINI1
TStik Revision 1.XX
(replaced by TStik2)
TStik Revision 2.XX
(now shipping)		 SNAP Rev C
Micro-controller
DS80C390 at 18.432 MHz x 2 = 36.864 MHz
DS80C400 at 14.7456 MHz X 2 = 29.4912 MHz.
DS80C400 at 15.0000 MHz x 2 = 30.0000 MHz
 Imsys cJip
Ethernet
10 BaseT, using SMC91C96 controller external to DS80C390.
10/100 BaseT. Integrated ethernet media access controller.
10/100 BaseT. Integrated ethernet media access controller. 10/100 BaseT
Memory mapped I/O bus?
Yes - unbuffered address, data, and control signals are available on the SIMM72 connector.
No. Address, data, and control signals are internal to the module and are not available on the SIMM72 connector.
 No. Address, data, and control signals are internal to the module and are not available on the SIMM72 connector. Yes
NVRAM (battery backed SRAM)
512 Kbytes or 1 Mbyte
Battery life indefinite with power applied, several years typical without external power
512 KBytes or 1 MByte
Battery life indefinite with power applied or occaissional outages, less than 1 year without any external power
 512 KBytes or 1 MByte
Battery life indefinite with power applied, several years typical without external power		 None -- uses 8 MBytes of DRAM instead. There is no NVRAM data storage, rather, files are saved in flash.
Flash
512 Kbytes. 64 Kbytes available for user applications.
2 Mbytes. 1.5 Mbytes available for user applications
 2 Mbytes. 1.5 Mbytes available for user applications 2 MBytes
UARTs
Serial0 and Serial1:
Serial0 has both TTL- and RS232- level signals.
Serial1 has TTL-level signals or can be used as 1-Wire network.
Serial0, Serial1 and Serial4:
Serial0 is dedicated to RS232-level signals.
Serial1 is dedicated to 1-Wire network.
Serial4 has TTL-level signals.
 Serial0, Serial1 and Serial4:
Serial0 is dedicated to RS232-level signals.
Serial1 is usable with 1-Wire network or as TTL-level signals and may be switched at runtime under program control.
Serial4 has TTL-level signals.		 Three UARTs
Control Area Net (CAN)
Two channels, but pins are shared with I2C and serial1. Due to 18.432 Mhz crystal, accurate baud rates above 125K are NOT possible.
One channel, pins shared with I2C. Due to 14.7456 Mhz crystal, accurate baud rates above 125K are not possible.
 One channel, with pins for full time CAN use. Thanks to the 15 Mhz crystal, accurate baud rates above 125K are possible. One channel. Due to external CAN controller SJA1000T with its own crystal, accurate baud rates above 125K are possible.
SPI Yes, with one slave select. Yes, with provision for four slave selects Yes, with provision for four slave selects Yes, same as TINI390
I2C Yes, but pins are shared with CAN Yes, but pins are shared with CAN Yes, with separate pins for full time I2C use.
Also useable in shared pin mode like DSTINI1 and TStik1 		Yes, but pins are shared with CAN
Power supply 5 VDC +/- 5%, all chips on the module are powered by 5 volts. 5 VDC +/- 5%, most chips on the module actually run on 3.3 or 2.5 volts. 5 VDC +/- 5%, most chips on the module actually run on 3.3 or 2.5 volts. 5 VDC +/- 5%

DSTINI1 (Dallas TINI390 module) and TStik (Systronix TINI400 module) Signal Comparison and Compatibility
Both DSTINI1 and TStik are SIMM72 modules with compatible pinouts
Text in RED indicates significant differences between DSTINI1 and TStik which could cause concerns for some users.
Text in BLUE indicates new features of TStik which should not cause problems for most users and will typically be benefits.
DSTINI1 Simm72
pin# & name
note 1
Dallas DSTINI1
(TINI390-based)
description

Systronix TStik1
Versions 1.XX
(TINI400-based)
(replaced by TStik2)

 Systronix TStik2
(now shipping)
(TINI400-based)
 Imsys SNAP
Rev C
Explanation and comments
1 - IN3/ IOS2
input/DCD
P1.4/DCD
 same as TStik 1.XX  

DSTINI1: These are SMC91C96 input bits. They can be used as general-purpose I/O bits or hardware handshaking signals.

TStik: These are dual-purpose port pins. These signals can be used as general purpose I/O bits or hardware handshaking signals. Since many people use Serial0 for JavaKit loader use, Systronix socket boards dedicate the TINI400 hardware handshake lines to Serial4.

2 - IN1/IOS0
input/CTS
P3.3/CTS
 same as TStik 1.XX  
3 - GND GND GND GND GND Ground
4 - GND
5 - GND
GND
serial4
4 - TX4
5 - RX4
 same as TStik 1.XX serial4
4 - TX4
5 - RX4

TStik: Serial4 is new to the DS80C400 chip. TStik makes serial4 available on two newly-assigned Simm72 pins. This added function is not available on current DSTINI1 sockets, and is transparently available on new TStik sockets. Serial4 can have hardware handshake signals associated with it. The hardware handshake association is determined by 1) socket board hardware and 2) TINI firmware. Since many people use Serial0 for JavaKit loader use, Systronix socket boards dedicate the TINI400 hardware handshake lines to Serial4.

TStik uses pins 4 and 5 for Serial4 TX and RX. TStik is not harmed when it is plugged into a TINI390 socket which grounds these pins.
6 - GND
7 - GND		 GND GND GND GND Ground
14 - TX1
15 - RX1
Serial1 TXD/RXD TTL level
or 2nd CAN
or external 1-Wire
not present

14 - TX1
15 - RX1

Serial1 TXD/RXD TTL level

 14 - TX1
15 - RX1

DSTINI1: serial1 uses P5.2 (RX1) and P5.3 (TX1) which can also serve as the second CAN port. These signals can be used as TTL-level serial1 signals. Serial1 can also be used for 1-Wire communication by enabling the DS2480 serial to 1-Wire interface (by asserting the EN2480 signal).

TStik 1: RX1 and TX1 do not have an alternate CAN1 function, and RX1 and TX1 are not present on the SIMM72 connector. Serial1 is dedicated to 1-Wire. (If you want another serial port, the new Serial4 is available.) The external 1-Wire net appears on Simm72.8, the same as DSTINI1.

TStik 2: Serial1 can be used for 1-Wire or as asynchronous serial. TTL-level TX1 and RX1 are available on the same edge contacts as TINI390.
26 - EN2480
enables 1-Wire interface
not present
 enables 1-Wire interface, and interacts with the TStik conifguration register so that you can dynamically switch use of Serial1 from within your TINI program  

DSTINI1 uses this signal to control the function of serial1: as an asynchronous serial port or as a 1-Wire network port.

TStik2 supports this control of Serial1, TStik1 did not.
21 - TX
22 - XRX0

Serial0, TTL levels

XRX0 is an input to an HC08, and has a 10K pullup to 5 volts.
TX is the 80C390 P3.1(serial0 TXD). Note that TX is driven when Serial0 is used in either RS232 or TTL modes.
not present

21 - SCL from C400 P1.1 (SCL)
22 - SDA from C400 P1.0 (SDA)
new "full-time" I2C pins to support simultaneous use of I2C and CAN

Note 2

Serial0, TTL levels

XRX0 is an input to an HCT08, and has a 10K pullup to 5 volts.
TX is an FPGA output and drives the input of a MAX3232 and has a 10K pullup to 5 volts.

TStik1 and TStik2 do not make TTL level Serial0 signals available. Since Serial0 is typically dedicated to slush, there's little reason to want such access. This is especially true on TStik, which adds a new UART - Serial4.

TStik2 adds I2C signals to these pins so that you can use CAN and I2C at the same time. This is a powerful new feature not available on any other TINI platform (as far as we know).
10 - CTX or SCL
11 - CRX or SDA
CAN0 or I2C

CAN or I2C
10 - P1.1/SCL/P5.0/CTX
11 - P1.0/SDA/P5.1/CRX

CAN or I2C
10 - P1.1/SCL/P5.0/CTX
11 - P1.0/SDA/P5.1/CRX

On TStik2, these pins may be used for CAN full time, with I2C on pins 21 and 22. For compatability with older TStiks, CAN and I2C can still be shared on these pins 10 and 11 as they also are on TINI390 and SNAP.

  

DSTINI1: P5.0 (CTX) and P5.1 (CRX) can be used as CAN signals These also are used by I2C: P5.0 (SCL/clock) and P5.1 (SDA/data). Because these port pins share SIMM72 positions, you cannot use CAN0 and I2C at the same time.

TStik provides a software-driven configuration register to select whether CAN (P5.0 and P5.1) or I2C (P1.0 and P1.1) appears on Simm72 pins 10 and 11. If you are not using these pins as CAN/I2C they are usable as general purpose I/O pins. On TStik, the CAN and I2C signals are unbuffered, but are bidirectional TTL level, 3.3V voltage range, 5V tolerant. Since TStik uses no buffering, you may use external pullups on the SDA line. The SCLK line is bidirectional, so peripherals can pull it low.

18 - SMCRST

P3.4, controlled by TINI firmware, resets ethernet controller and peripherals on socket board.

 

Buffered DS80C400 RSTOL(L), called PRST

 Buffered DS80C400 RSTOL(L), called PRST  

DSTINI1: SMCRST drives the reset input of the SMC91C96 ethernet controller. It is also used on the Dallas E50 to reset the parallel port and DUART. SMCRST is I/O pin P3.4, and is controlled by TINI firmware. SMCRST is driven high for 5 to 10 seconds following any hardware reset (power-on reset, pushbutton reset, or DTR reset from JavaKit). SMCRST is asserted while JavaKit is talking to the TINI bootloader.

TStik: PRST has a similar but not identical implementation. P3.4 is no longer available for use as a firmware reset. PRST is a buffered and inverted version of the DS80C400 RSTOL signal. PRST can also be controlled by the TStik configuration register. For complete details please see the TStik.72.nb Signal Description: PRST
12 - CE0
controls where DSTINI1 reads code on startup

P6.1/CE5
SPI MOSI

 same as TStik 1.XX  

DSTINI1: CE0 must be connected to RCE0 to boot from onboard flash. Alternatively, CE0 can be used to enable external boot memory, and RCE0 is driven high to disable the onboard flash.

TStik boots from internal ROM so there is no equivalent use for this signal.

TStik connects SIMM72.12 pin to the DS80C400 signal P6.1 which is used as SPI MOSI (Master Out, Slave In) signal. When TINI400 boots up, CE5 is configured as a 2 MByte chip select, so other use requires appropriate reconfiguration. The TStik SPI and Configuration Register API perform this reconfiguration. In order to access the Configuration Register this signal must be allowed to be used as MOSI by the TStik API.

TStik uses SIMM72.45 (P6.2) as SPI MISO.

45- RCE0

P6.2/CE6
SPI MISO

 same as TStik 1.XX  
PCE[0-3]
30 - PCE0
29 - PCE1
28 - PCE2
27 - PCE3
P5.4,5,6,7 or PCE[0-3] used as general purpose I/O or peripheral chip selects (each can be 1 MByte max)

general purpose I/O bits

 same as TStik 1.XX  

DSTINI1: these are used as general purpose I/O, peripheral chip selects (1 MByte max), or SPI pins when using the optional Dallas SPI package. (TINI390 offers only one SPI chip select.)

TStik: these are not usable as peripheral chip selects because merging code and data space on CE0 and CE1 prevents such use. For more information on these pins please see the TStik.72.nb Signal Description: PCE
31- CE3
I/O, ethernet & RTC
not present
 same as TStik 1.XX   Since TStik.72.nb has no external address/data bus, there is no way to use this signal, and it is not present on the TSTik edge connector.
59 - IN2/ IOS1
input bit
P6.0/CE4
SPI SCK
same as TStik 1.XX  

DSTINI1: an SMC91C96 input bit.

TStik: The DS80C400 has an internal ethernet media access controller so there is no direct equivalent of this signal. We have assigned this pin to the 80C400 P6.0/CE4 which is the SPI Clock (SCK) signal. When TINI400 boots, CE4 is configured as a 2 MByte chip select. The TStik API and SPI packages perform the appropriate reconfiguration.
62 - A18
address line 18
not present
 same as TStik 1.XX  

DSTINI1: One potential 'Achilles heel' is the close physical proximity of A18 to the ethernet signal ETH3. The SIMM72 pads are 0.008 inches apart. There is some speculation that a noise spike on the ethernet connection could arc over to A18, mortally wounding the controller and therefore the TINI390 module.

TStik has no external address and data bus and does not bring A18 to the SIMM72 connector, so it cannot have this vulnerability.
63 ETH3
64 ETH6
65 ETH2
66 ETH1
RJ45
10BaseT
RJ45
10/100 BaseT
 same as TStik 1.XX   TStik supports both 10BaseT and 100BaseT. For more details consult the TStik Quick and Technical References.

67, 68, 69, 70
VCC
5V +/- 5% input
5V +/- 5% input
pins 68,69 only
 same as TStik 1.XX  

The TINI390 chipset uses 5 volts. The TINI400 chipset uses 3.3 and 1.8 volts. Since the TINI390 Simm72 module only has 5 volt supply pins, TStik uses onboard converters to generate 3.3 and 1.8 volts.

TStik voids pins 67 and 70 so that there is virtually no chance of a voltage surge on Ethernet ETH1 (pin 66) arcing to VCC and damaging TStik. Pin 70 is not used on TStik.72.nb, but is reserved for possible future use.
71 -OUT1/ EESK
output/RTS
P1.6/RTS
 same as TStik 1.XX  

DSTINI1: these are SMC91C96 output bits.

TStik: These are dual-purpose port pins. These signals can be used as general purpose I/O bits or hardware handshaking signals. Since many people use Serial0 for JavaKit loader use, Systronix socket boards dedicate the TINI400 hardware handshake lines to Serial4.

72 - OUT2/EEDO
output/DTR
P1.5/DTR
 same as TStik 1.XX  

NOTES

  1. The first name is from the Dallas DSTINI1 data sheet, dated 05 March 2001. The second name is from the Dallas TINI rev D schematics
  2. The TStik2 SDA signal could possibly be driven by some old TINI390 socket boards which used the XRX0 input as a secondary serial0 connection - for example, Dallas TINI390 Socket Rev C, if it has the U3 DS229 stuffed. This would make TStik2 I2C unusable (it won't permanently harm TStik2). We believe that most third-party socket boards do not use XRX0 and TX0 for serial I/O and will not clash with TStik2 I2C signals. If this applies to you, it's possible to cut that signal free on TStik2 - please contact Systronix for further assistance.


Summary of TStik signal differences (not yet updated for TStik2 and SNAP)
SIMM72
pin #		 Dallas DSTINI1
Signal		 Systronix TStik.72.nb
Signal
TStik Socket Comments
54..57, 36..33, 37..44, 60..62, 13 A[0..19] not present, pad voided TStik.72.nb has no external address and data bus, or strobes. New TStik socket boards should leave these pins unconnected.
53..46 D[0..7]
16, 58, 32 RD, WR, PSEN
31 CE3
22, 21 XRX0, TX TStik.72.nb has no TTL-level serial0 signals.
15, 14 XRX1, TX1 Serial1 is dedicated to 1-Wire on TStik.72.nb
18 SMCRST PRST See PRST details above. PRST is similar in function to SMCRST
12 CE0 P6.1/CE5 or SPI MOSI CEO is not present on TStik. See CE0 above. TStik uses this as SPI MOSI.
45 RCE0 P6.2/CE6 or SPI MISO RCEO is not present on TStik. See RCE0 above. TStik uses this as SPI MISO.
59 IN2/IOS1 P6.0/CE4 or SPI CLK TStik uses this as SPI clock (SCK).
30 PCE0/SPI CLK PCE0, I/O, or SPI SCS3 See PCE above. Can be used as general-purpose I/O, or SPI signal. The Systronix SPI package uses these as SPI slave selects.
29 PCE1/SPI MOSI PCE1, I/O, or SPI SCS2
28 PCE2/SPI MISO PCE2, I/O, or SPI SCS1
27 PCE3/SPI SCS0 PCE3, I/O, or SPI SCS0
1 IN3/IOS2 P1.4/DCD Can be an I/O pin, or used with Serial4 hardware handshake lines.
2 IN1/IOS0 P3.3/CTS Can be an I/O pin, or used with Serial4 hardware handshake lines.
4 GND P6.7/ TX4 TStik can be used in current DSTINI1 sockets, in which case this pin is not driven by firmware and is pulled to ground by the DSTINI1 socket. In a TStik socket, it functions either as an I/O pin or serial4 TXD.
5 GND P6.6/RX4 TStik can be used in current DSTINI1 sockets, in which case this pin is not driven by firmware and is pulled to ground by the DSTINI1 socket. In a TStik socket, it functions either as an I/O pin or serial4 RXD.
71 OUT1/EESK P1.6/RTS Can be an I/O pin, or used with Serial4 hardware handshake lines.
72 OUT2/EEDO P1.5/DTR
67 VCC (5 VDC) not present, pad voided New TStik socket boards should not connect this pin to Vcc, and should void the pad so that there is reduced chance of an ethernet surge arcing from SIMM72.66 (ETH1)
70 VCC (5 VDC) N/C, reserved New TStik socket boards should not connect this pin.
 
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